My next big project is 4×4 bit 2PASCL Multiplier.

  1. Start from Half Adder, Full Adder, AND logic –status : done
  2. Combine and simulation for 4×4 bit 2PASCL Multiplier — target SW (study week) 1 : done
  3. Start design layout and design rules check (deadline Sw11) : done
  4. Send for fabrication (SW12) : done today

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